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as1334 650ma, ultra low ripple step down dc/dc converter www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 1 - 18 datasheet 1 general description the as1334 is a step-down dc-dc converter designed to power portable applications from a single li-ion battery. the device also achieves high-performance in mobile phones and other applications requiring low dropout voltage. the as1334 operates from an input voltage range of 2.7 to 5.5v wh ile providing output voltages of 1.2, 1.5, 1.8, 2.5, 3.0 and 3.3v. fixed-frequency pwm operation minimizes rf interference. shut down function turns the device off and reduces battery consumption to 0.01a (typ). the as1334 is available in a tdfn(3x3) 8-pin package. a high switc hing frequency (2 mhz) allows use of tiny surface-mount components. only three small external surface-mount components, an inductor and two ceramic capacitors are required. figure 1. as1334 - typical application circuit 2 key features output voltage ripple: 2mv pwm switching frequency: 2mhz single lithium-ion cell operation output voltage range: 1.2v to 3.4v (available in 100mv steps, see ordering information on page 17 ) fixed output voltages: - 1.2v, 1.5v, 1.8v, 2.5v, 3.0v, 3.3v maximum load capability of 650ma 97% high efficiency, 94% average efficiency current overload protection thermal overload protection power-ok soft start low dropout voltage (140 m typ pfet) tdfn(3x3) 8-pin 3 applications the as1334 is an ideal solution to supply noise sensitive applications as cellular phones, hand-held radios, rf pc cards, ba ttery powered rf devices, rfid chipsets, a/d converter, sensors and opamps. as1334 pgnd sgnd en pv in vdd sw fb 10 f 3.3 h v out v in 10 f on off pok ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 2 - 18 as1334 datasheet - pin assignments 4 pin assignments figure 2. pin configuration 4.1 pin descriptions table 1. pin descriptions pin number pin name description 1 fb feed back pin. connect to the output at the output filter capacitor. 2 pok power -ok. 0 = v out < 90% of v outnom . 1 = v out > 90% of v outnom . 3 en enable input. se t this digital input high for normal operation. for shutdown, set low. 4 vdd +2.7v to +5.5v power supply voltage. an alog supply input. 5, 9 sgnd an alog and control ground. connect these pins with low resistance to pgnd. 6 pvin +2.7v to +5.5v power supply voltage. input to the internal pfet switch. 7s w switch pin. switch node connection to the internal pfet switch and nfet synchronous rectifier. connect to an inductor with a saturation current rating that exceeds the maximum switch peak current limit specification of the as1334. 8p g n d power ground. connect this pin with low resistance to sgnd. 5sgnd 3 en 2 pok 1 fb 8pgnd as1334 4 vdd 7 sw 6pv in 9 sgnd ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 3 - 18 as1334 datasheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in electrical characteristics on page 4 is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability . table 2. absolute maximum ratings parameter min max units notes electrical parameters vdd, pvin to sgnd -0.3 +7.0 v pgnd to sgnd -0.3 +0.3 v pok, en, fb sgnd - 0.3 vdd + 0.3 v 7.0v max sw pgnd - 0.3 pvin + 0.3 v pvin to vdd -0.3 +0.3 v input voltage range 2.7 5.5 v recommended load current 650 ma ambient temperature (t a ) range -40 +85 oc in applications where high power dissipation and/ or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. maximum ambient temperature (t a-max ) is dependent on the maximum operating junction temperature (t j-max-op = 125oc), the maximum power dissipation of the device in the application (p d-max ), and the junction-to ambient thermal resistance of the part/package in the application ( ja ), as given by the following equation: t a-max = t j-max-op ? ( ja p d-max ). electrostatic discharge human body model 2 kv norm: mil 883 e method 3015 temperature ranges and storage conditions junction temperature (t j-max ) +150 oc storage temperature range -55 +150 oc package body temperature +260 oc the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/ jedec j-std-020?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices?. the lead finish for pb-free leaded packages is matte tin (100% sn). humidity 5 86 % non-condensing moisture sensitive level 1 represents a max. floor life time of unlimited ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 4 - 18 as1334 datasheet - electrical characteristics 6 electrical characteristics t a = t j = -40oc to +85oc; pv in = vdd = en = 3.6v, unless otherwise noted . typical values are at t a =25c. table 3. electrical characteristics symbol parameter conditions min typ max units t a operating temperature range -40 +85 c v out output voltage pv in = 3.6v 1.176 1.2 1.224 v 1.47 1.5 1.53 v 1.764 1.8 1.836 v 2.45 2.5 2.55 v 2.94 3.0 3.06 v 3.234 3.3 3.366 v i shdn shutdown supply current en = sw = 0v 1 1. shutdown current includes leakage current of pfet. 0.01 2 a i q dc bias current into vdd fb = 0v, no switching 2 2. i q specified here is when the part is operating at 100% duty cycle. 11.4ma r dson(p) pin-pin resistance for pfet i sw = 200ma; t a = +25c 140 200 m i sw = 200ma 230 r dson(n) pin-pin resistance for nfet i sw = -200ma; t a = +25c 300 415 m i sw = -200ma 485 i lim,pfet switch peak current limit 935 1100 1200 ma pok output v ol pok output low voltage pok sinking 0.1ma 0.05 0.2 v pok output high leakage current pok = 3.6v 500 na pok threshold falling edge, referenced to v out(nom) 87 90 93 % enable input v ih,en logic high input threshold 1.2 v v il,en logic low input threshold 0.5 v i pin,enable pin pull down current 510a oscillator f osc internal oscillator frequency 1.8 2 2.2 mhz ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 5 - 18 as1334 datasheet - electrical characteristics 6.1 system characteristics t a = 25oc; pv in = vdd = en = 3.6v, unless otherwise noted . the following parameters are verified by characterisation and are not production tested . table 4. system characteristics symbol parameter conditions min typ max units t _on turn on time (from enable low to high transition) en = low to high, v in = 4.2v, c out = 10f, i out 1ma 210 350 s efficiency (l = 3.3h, dcr 100m ) v in = 3.6v, i out = 400ma 96 % v out _ripple ripple voltage, pwm mode 1 1. ripple voltage should measured at c out electrode on good layout pc board and under condition using suggested inductors and capac- itors. note: all limits are guaranteed. the parameters with min and max values are guaranteed with production tests or sqc (statistical qual ity control) methods. v in = 4.2v, i out = 10ma to 400ma 5mvp-p line_tr line transient response v in = 600mv perturbance, over v in range 3.4v to 5.5v; t rise = t fall = 10s, v out = 3.0v, i out = 100ma 50 mvpk load_tr load transient response v in = 4.2v, v out = 3.0v, transients up to 100ma, t rise = t fall = 10s 50 mvpk ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 6 - 18 as1334 datasheet - typical operating characteristics 7 typical operating characteristics circuit in figure 23 on page 11 , pv in = v dd = en = 3.6v, l = 3.3h (lps4018-332ml_), c in = c out = 10f (grm21br61c106ka01) unless otherwise noted. figure 3. quiescent current vs. v in figure 4. shutdown current vs. temperature 0.35 0.4 0.45 0.5 0.55 2.5 3 3.5 4 4.5 5 5.5 supply voltage (v) quiescent current (ma) - 45c + 25c + 85c 0 0.05 0.1 0.15 0.2 0.25 0.3 -40 -15 10 35 60 85 temperature (c) shutdown current (a) vi n=3. 25v vi n=3. 6v vi n=4. 2v vi n=5. 5v figure 5. switching frequency variation vs. temperature figure 6. output voltage vs. supply voltage -4 -3 -2 -1 0 1 2 3 4 -40 -15 10 35 60 85 temperature (c) switching frequency variation (%) vi n=3. 6v vi n=4. 2v vi n=5. 5v 2.94 2.96 2.98 3 3.02 3.04 3.06 3.25 3.75 4.25 4.75 5.25 supply voltage (v) output voltage (v) iout=50ma iout=300ma iout=650ma ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 7 - 18 as1334 datasheet - typical operating characteristics figure 7. output voltage vs. temperature figure 8. efficiency vs. output current 2.94 2.96 2.98 3 3.02 3.04 3.06 -40 -15 10 35 60 85 temperature (c) output voltage (v) iout=50ma iout=300ma iout=650ma 70 75 80 85 90 95 100 0 100 200 300 400 500 600 700 output current (ma) efficiency (%) vi n=3. 25v vi n=3. 6v vi n=3. 9v vi n=4. 2v vi n=4. 5v vi n=5. 5v figure 9. switch peak current limit vs. temperature; closed loop figure 10. load transient response; v out = 3.0v, v in = 4.2v 1 1.05 1.1 1.15 1.2 -40 -15 10 35 60 85 temperature (c) peak current limit (a) vi n=2. 7v vi n=3. 6v vi n=5. 5v 10s/div 400ma 200mv/div 200ma/div v out i l i out 100ma figure 11. startup; v in = 3.6v, v out = 3.0v, i out <1ma, r load =3.3k figure 12. startup; v in = 4.2v, v out = 3.0v, i out <1ma, r load =3.3k 500ma/div 5v/div v sw i l 50s/div v out en 2v/div 2v/div 500ma/div 5v/div v sw i l 50s/div v out en 2v/div 1v/div ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 8 - 18 as1334 datasheet - typical operating characteristics figure 13. shutdown response; v in =3.6v, v out =3.0v, r load =5 figure 14. shutdown response; v in =4.2v, v out =3.0v, r load =5 50s/div 500ma/div 5v/div 2v/div 2v/div v sw i l v out en 50s/div v sw i l v out en 500ma/div 5v/div 2v/div 2v/div figure 15. line transient response; v in =3.3v to 3.9v, i out =100ma, v out =3.0v figure 16. timed current limit response; v in =3.6v, v out =3.0v 50s/div 100ma/div 1v/div 50mv/div v in i l v out 10s/div 2a/div 2v/div 2v/div v sw i l v out figure 17. output voltage ripple; v out = 3.0v, i out = 200ma figure 18. v out ripple in skip mode; v in =3.31v, v out =3.0v, r load =5 200ns/div 100ma/div 2v/div v sw i l 5mv/div v out 1s/div 10mv/div 2v/div 200ma/div v sw i l v out ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 9 - 18 as1334 datasheet - typical operating characteristics figure 19. r dson (p-channel) vs. temp.; i sw =200ma figure 20. r dson (n-channel) vs. temp.; i sw =-200ma 0 50 100 150 200 250 300 350 -40 -15 10 35 60 85 temperature (c) r dson (m ) vi n=2. 7v vi n=3. 6v vi n=5. 5v figure 21. en high threshold vs. v in 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 2.5 3 3.5 4 4.5 5 5.5 supply voltage (v) en high threshold (v) - 45c + 25c + 90c ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 10 - 18 as1334 datasheet - detailed description 8 detailed description the as1334 is a simple, step-down dc-dc converter optimized for powering portable applications that require low dropout voltage s such as mobile phones, portable communicators, and similar battery powered rfid devices. besides being packed with numerous features li ke current overload protection, thermal overload shutdown and soft start, as1334 displays the following characteristics: its operation is based on current-mode buck architecture with synchronous rectification for high efficiency. allows the application to operate at maximum efficiency over a wide range of power levels from a single li-ion battery cell. provides for a maximum load capability of 650ma in pwm mode, wherein the maximum load range may vary depending on input voltage , output voltage and the selected inductor. is ranked at an efficiency of around 96% for a 400ma load with a 3.6v input voltage. figure 22. as1334 - functional block diagram the size of the external components is reduced by using a high switching frequency (2mhz). figure 1 on page 1 demonstrates that only three external power components are required for implementation. also, t he system controller should set en low during power-up and ot her low supply voltage conditions. see shutdown mode on page 12 . mosfet control logic shutdown control main control soft start oscillator current sense pvin pwm comp vdd error amplifier fb en sw sgnd pgnd as1334 pok + ? 1.13v ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 11 - 18 as1334 datasheet - detailed description figure 23. typical operating system circuit 8.1 operating the as1334 as1334?s control block turns on the internal pfet (p-channel mosfet) switch during the first part of each switching cycle, thus allowing current to flow from the input through the inductor to the output filter capacitor and load. the inductor limits the current to a ramp with a slope of around (v in - v out ) / l, by storing energy in a magnetic field. during the second part of each cycle, the controller turns the pfet switch off, blocking current flow from the input, and then turns the nfet (n- channel mosfet) synchronous rectifier on. as a result, the inductor?s magnetic field collapses, generating a voltage that force s current from ground through the synchronous rectifier to the output filter capacitor and load. while the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope around v out / l. the output filter capacitor stores charge when the inductor current is high, and releases it when low, smoothing the voltage across the load. the output voltage is regulated by modulating the pfet switch on time to control the average current sent to the load. the effect i s identical to sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier at sw to a low-pass filter formed by the inductor and output filter capacitor. the output voltage is equal to the average voltage at the sw pin. while in operation, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control power to the load. energy per cycle is set by modulating the pfet switch on-time pulse width to control the peak inductor curre nt. this is done by comparing the signal from the current-sense amplifier with a slope compensated error signal from the voltage-feedback error amplifier. at the beginning of each cycle, the clock turns on the pfet switch, causing the inductor current to ramp up. when the current sense si gnal ramps past the error amplifier signal, the pwm comparator turns off the pfet switch and turns on the nfet synchronous rectifier, ending th e first part of the cycle. if an increase in load pulls the output down, the error amplifier output increases, which allows the inductor current to ramp h ig her before the comparator turns off the pfet. this increases the average current sent to the output and adjusts for the increase in the load. before appearing at the pwm comparator, a slope compensation ramp from the oscillator is subtracted from the error signal for stability of the c urrent feedback loop. the minimum on time of pfet in pwm mode is 50ns (typ). on/off system con- troller 2.7v to 5.5v as1334 pgnd sgnd en pv in vdd sw fb 10 f 3.3 h v out v in 10 f pok ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 12 - 18 as1334 datasheet - detailed description 8.2 internal sync hronous rectifier to reduce the rectifier forward voltage drop and the associated power loss, the as1334 uses an internal nfet as a synchronous r ectifier. the big advantage of a synchronous rectification is the higher efficiency in a condition where the output voltage is low compared t o the voltage drop across an ordinary rectifier diode. during the inductor current down slope in the second part of each cycle the synchronous rec tifier is turned on. before the next cycle the synchronous rectifier is turned off. there is no need for an external diode because the nfet is conducting through its intrinsic body diode during the transient int e rvals before it turns on. 8.3 power-ok the pok output indicates if the output voltage is within 90% of the nominal voltage level. as long as the output voltage is wit hin regulation the open-drain pok output sinks current. 8.4 shutdown mode if en is set to high (>1.2v) the as1334 is in normal operation mode. during power-up and when the power supply is less than 2.7 v minimum operating voltage, the chip should be turned off by setting en low. in shutdown mode the following blocks of the as1334 are tur ned off, pfet switch, nfet synchronous rectifier, reference voltage source, control and bias circuitry. the as1334 is designed for compact po rtable applications, such as mobile phones where the system controller controls operation mode for maximizing battery life and require ments for small package size outweigh the additional size required for inclusion of uvlo (under voltage lock-out) circuitry. note: setti ng the en digital pin low (<0.5v) places the as1334 in a 0.01a (typ) shutdown mode. 8.5 thermal over load protection to prevent the as1334 from short-term misuse and overload conditions the chip includes a thermal overload protection. to block the normal operation mode the device is turning the pfet and the nfet off in pwm mode as soon as the junction temperature exceeds 150c. t o resume normal operation the temperature has to drop below 140c. note: conti nuing operation in thermal overload conditions may damage the device and is considered bad practice. 8.6 current limiti ng for protection if in the pwm mode the cycle-by-cycle current limit of 1200ma (max.) is reached the current limit feature takes place and prote cts the device and the external components. a timed current limiting mode is working when a load pulls the output voltage down to approximately 0. 375v. in this timed current limit mode the inductor current is forced to ramp down to a safe value. this is achieved by turning off the inter nal pfet switch and delaying the start of the next cycle for 3.5us. the synchronous rectifier is also turned off in the timed current limit mode. the advantage of the timed current limit mode is to prevent the device from the loss of the current control. ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 13 - 18 as1334 datasheet - application information 9 application information 9.1 inductor selection for the external inductor, a 3.3h inductor is recommended. minimum inductor size is dependant on the desired efficiency and ou tput current. inductors with low core losses and small dcr at 2mhz are recommended. 9.2 capacitor selection a 10f capacitor is recommended for c in as well as a 10f for c out . small-sized x5r or x7r ceramic capacitors are recommended as they retain capacitance over wide ranges of voltages and temperatures. 9.2.1 input and output capacitor selection low esr input capacitors reduce input switching noise and reduce the peak current drawn from the battery. also low esr capacito rs should be used to minimize v out ripple. multi-layer ceramic capacitors are recommended since they have extremely low esr and are available in small footprints. for input decoupling the ceramic capacitor should be located as close to the device as practical. a 4.7f input capacitor is su f ficient for most applications. larger values may be used without limitations. a 2.2f to 10f output ceramic capacitor is sufficient for most applications. larger values up to 22f may be used to obtain ex treme ly low out - put voltage ripple and improve transient response. 9.3 en pin control drive the en pin using the system controller to turn the as1334 on and off. use a comparator, schmidt trigger or logic gate to drive the en pin. set en high (>1.2v) for normal operation and low (<0.5v) for a 0.01a (typ) shutdown mode. set en low to turn off the as1334 du ring power-up and under voltage conditions when the power supply is less than the 2.7v minimum operating voltage. the part is out of regulati on when the input voltage is less than 2.7v. table 5. recommended inductor part number l dcr current rating dimensions (l/w/t) manufacturer lps4018-222ml_ 2.2h 0.070 2.9a 3.9x3.9x1.7mm coilcraft www.coilcraft.com lps4018-332ml_ 3.3h 0.080 2.4a 3.9x3.9x1.7mm lps4018-472ml_ 4.7h 0.125 1.9a 3.9x3.9x1.7mm table 6. recommended input and output capacitor part number c tc code rated voltage dimensions (l/w/t) manufacturer grm188r60j475ke19 4.7f x5r 6.3v 0603 murata www.murata.com grm219r60j475ke19 4.7f x5r 6.3v 0805 grm21br61c475ka88 4.7f x5r 16v 0805 grm31cr71e475ka88 4.7f x7r 25v 1206 grm188r60j106me47 10f x5r 6.3v 0603 grm21br60j106ke19 10f x5r 6.3v 0805 grm21br61a106ke19 10f x5r 10v 0805 grm32dr71c106ka01 10f x7r 16v 1210 grm21br60j226me39 22f x5r 6.3v 0805 grm32er71a226ke20 22f x7r 10v 1210 ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 14 - 18 as1334 datasheet - application information 9.4 layout considerations the as1334 converts higher input voltage to lower output voltage with high efficiency. this is achieved with an inductor based switching topology. during the first half of the switching cycle, the internal pmos switch turns on, the input voltage is applied to the inductor, and the current flows from pvdd line to the output capacitor (c2) through the inductor. during the second half cycle, the pmos turns of f and the internal nmos turns on. the inductor current continues to flow via the inductor from the device pgnd line to the output capacitor (c2). referring to figure 24 , the as1334 has two major current loops where pulse and ripple current flow. the loop shown in the left hand side is most impo rtan t, because pulse current shown in figure 24 flows in this path. the right hand side is next. the current waveform in this path is triangular, as shown in figure 24 . pulse current has many high-frequency components due to fast di/dt. triangular ripple current also has wide high-frequency components. board layout and circuit pattern design of these two loops are the key factors for reducing noise radiation and sta ble operation. other lines, such as from battery to c1(+) and c2(+) to load, are almost dc current, so it is not necessary to take so much car e. only pattern width (current capability) and dcr drop considerations are needed. figure 24. current loop pgnd sgnd pok en pv in vdd sw fb 10 f 3.3 h v out 3.25v to 5.5v v in 10 f c1 + - c2 + - l1 i f osc = 2mhz i ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 15 - 18 as1334 datasheet - package drawings and markings 10 package drawin gs and markings figure 25. tdfn(3x3) 8-pin marking table 7. pack aging code yywwqzz yy ww q zz year identifier manufacturing week plant identifier free choice / traceability code ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 16 - 18 as1334 datasheet - package drawings and markings figure 26. tdfn(3x3) 8-pin package ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 17 - 18 as1334 datasheet - ordering information 11 ordering information the device is available as the standard products shown in table 8 . note: all products are rohs compliant. buy our products or get free samples online at icdirect: http://www.austriamicr osystems.co m/icdirect technical support is found at http://www.austriamicrosyste m s.com/technical-support for further information and requests, please contact us mailto:sales@austriamicrosystems.com or find your local distributor at http://www.austriamicros ystems.co m/distributor design the as1334 online at http://www.austriamicrosystems.com/analogbench analog bench is a powerful design and simulation support tool that operates in on-line and off-line mode to evaluate performance and generate application-specific bill-of-materials for austriamicrosystems' power management devices. table 8. ordering information ordering code marking output description delivery form package as1334-btdt-12 asr2 1.2v 650ma, ultra low ripple step down dc/dc converter tape and reel tdfn(3x3) 8-pin as1334-btdt-15 asr3 1.5v 650ma, ultra low ripple step down dc/dc converter tape and reel tdfn(3x3) 8-pin as1334-btdt-18 asr4 1.8v 650ma, ultra low ripple step down dc/dc converter tape and reel tdfn(3x3) 8-pin AS1334-BTDT-25 asr5 2.5v 650ma, ultra low ripple step down dc/dc converter tape and reel tdfn(3x3) 8-pin as1334-btdt-30 asqy 3.0v 650ma, ultra low ripple step down dc/dc converter tape and reel tdfn(3x3) 8-pin as1334-btdt-33 asr6 3.3v 650ma, ultra low ripple step down dc/dc converter tape and reel tdfn(3x3) 8-pin as1334-btdt-xx 1 1. non-standard devices are available between 1.2v and 3.4v in 100mv steps. for more information and inquiries contact http://www.aus - triamicrosystems.com/contact xxxx xxxx 650ma, ultra low ripple step down dc/dc converter tape and reel tdfn(3x3) 8-pin ams ag technical content still valid
www.austriamicrosystems.com/dc-dc_step-down/as1334 revision 1.09 18 - 18 as1334 datasheet copyrights copyright ? 1997-2010, austriamicrosystems ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria-europe. trademarks registe red ?. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth he rein or regarding the freedom of the described devices from patent infringement. austriamicrosystems ag reserves the right to change specificatio ns and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamic rosystems ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temper ature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems ag for each application. for shipments of les s than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact ams ag technical content still valid

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